| 类型 |
CPU / Microprocessor |
| 频率 |
33.33 MHz |
| 封装 |
144-pin PGA |
| 架构 / 微体系结构 |
| 制造工艺 |
High-speed CEMOS technology |
| 数据位宽 |
32 bit |
| 浮点单元 |
IDT**R3010 |
| 1级缓存大小 |
External 0 KB - 2** KB instruction cache External 0 KB - 2** KB data cache |
| Physical memory |
4 GB |
| Virtual memory |
4 GB |
| Pipeline |
* stages |
| 多重处理 |
Supported |
| On-chip peripherals |
- Memory Management Unit
- Coprocessor interface
- On-chip Cache Control
|
| 电/热参数 |
| V I/O or secondary |
*V ± *% |
| 最小/最大工作温度 |
0°C - *0°C |
| Maximum power dissipation |
3.** Watt (at * Volt) |
| Notes on IDT **R3000AE-33G144 |
- Some processors capabilities, such as cache size, multiprocessor interface, "big-endian" or "little-endian" byte ordering, can be configured immediately after processor reset
- Instruction-compatible with **R2000 and **R2000A processors
- Pin-compatible with **R2000A and **R3000 processors
- Some timing parameters (Data set-up time, Address valid and a few others) were improved
|